Aldec today announced that Cobham Gaisler has successfully verified its first RISC-V line of processors, called NOEL-V, using Riviera-PRO for mixed-HDL simulation....
Pre-silicon validation and verification of hardware security requirements are crucial, which pushes the need for more robust, efficient design flows....
OneSpin’s CEO explains what’s changing in AI, where it’s being used, and what still has to be fixed....
How to manage massive amounts of data in real time still isn’t clear, but it can’t be done in the cloud....
There’s still much work to be done to enable an open source hardware ecosystem....
To enable the user to debug easily, and incorporate this functionality in RTL, IDesignSpec (IDS) generates the required error signals....
New directions for a commonly used technology....
Given the importance of board prototyping, ISequenceSpec (ISS) from Agnisys provides a solution to automatically generate sequences for boards....
How well understood are domain crossings, especially when it involves multiple domains? They require a combination of methodology and tools....
Tools and methodologies exist, but who will actually do the verification is unclear....