Aldec - FirstEDA
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…is an industry-leading EDA company with a user community of more than 35,000. The company delivers innovative design creation, simulation and verification solutions to assist in the development of complex FPGA, ASIC, SoC and embedded system designs.

FirstEDA is proud to be the sole distribution and support channel for Aldec in the UK, Ireland, France, Belgium, The Netherlands, Spain, Portugal and across the Nordic countries. The products we support are:

FPGA Design & Simulation / FPGA

Active-HDL is a Windows-based, integrated design creation and simulation solution for engineers working on projects ranging from simple PLD ‘glue logic’ all the way up to several-million-gate system-on-chip FPGAs.

Advanced Design Rule Checking / FPGA / FV / SAFETY

ALINT-PRO is a design rule checking (DRC) tool. It uses rule files (‘policies’) to check that a design’s RTL adheres to a defined RTL coding style. It decreases development time dramatically by identifying design issues early in the development schedule.

Advanced Verification Platform / FV / FPGA / ASIC

Riviera-PRO addresses the verification requirements of engineers targeting large gate-count FPGAs, ASICs and System-on-Chip devices. It gives engineers the ultimate testbench in terms of productivity, reusability and automation; all by combining a high-performance simulation engine with advanced debugging capabilities (at different levels of abstraction).

Clock Domain Crossing Verification / FPGA / FV / SAFETY

ALINT-PRO-CDC is a design verification solution focused on clock domain crossing analysis and handling of metastability issues in complex, modern multi-clock designs.

Requirements Lifecycle Management / ReqM / SAFETY

Spec-TRACER is a unified requirements lifecycle management solution designed specifically for FPGA and ASIC designs. It facilitates requirements capture, management, impact analysis, traceability and reporting. Spec-TRACER seamlessly integrates with your Windows-based HDL design and simulation tools and also integrates directly with IBM Rational DOORS.

FPGA Level In-Target Testing / SAFETY

DO-254/CTS is a fully customised hardware and software platform that augments target board testing to increase verification coverage by test and to satisfy the verification objectives of DO-254/ED-80.

Hardware Assisted Verification / HW-V / PROTO / ASIC

HES-DVM is a fully automated verification and validation system for SoC ASIC designs of 200M+ ASIC gates. Aldec’s FPGA Hardware Emulation Solution is based on the latest Xilinx Virtex-7 devices and is capable of simulation acceleration, and SCE-MI transaction co-emulation.

ASIC Prototyping / HW-V / PROTO / ASIC

HES-7 provides SoC and ASIC verification and validation teams with a scalable and high-quality FPGA-based ASIC prototyping solution. Each HES-7 board with dual Xilinx Virtex-7 2000T has 4 million FPGA logic cells (or up to 24 million ASIC gates of capacity) not including the DSP and memory resources.

Prototyping Microsemi Rad Tolerant Devices / PROTO

Aldec and Microsemi have joined forces to offer an innovative, reprogrammable prototyping solution for Microsemi RTAX-S/SL, RTAX-DSP and RTSX-SU space-fight system designs. Unlike the traditional One Time Programmable (OTP) anti-fuse space-qualified FPGAs, the Aldec prototype adaptor uses flash-based, Microsemi ProASIC 3E FPGA technology for design prototype re-programmability.

Aldec delivers high quality EDA solutions for government, military, aerospace, telecommunications, automotive and safety critical applications.

Large companies including IBM, GE, Qualcomm, Rohde and Schwarz, Bosch, Texas Instruments, Applied Micro, Hewlett Packard, Toshiba, Intel, NEC, Mitsubishi, LG, Hitachi, NASA, Invensys, Westinghouse, Raytheon, Panasonic, Lockheed Martin, Samsung, as well as mid-size and small firms use Aldec EDA verification suites to boost product performance, cut design development cycles and reduce cost.

For further corporate and background information please visit the Aldec website.