ALINT-PRO is Aldec’s design rule checking (DRC) tool. It uses rule files (‘rule plug-ins’) to build company or project specific checks (‘policies’), in order to check that a design’s RTL adheres to a defined RTL coding style. For multi-clock or multi-reset designs, ALINT-PRO provides a full-scale CDC and RDC Verification solution, capable of complex clock and reset domain crossing analysis and handling of metastability issues. ALINT-PRO can suggest constraints based on the design analysis and considers constraints specified by the user in their SDC files. It decreases development time dramatically by identifying design issues early in the development schedule.


ALINT-PRO provides configurable design rules that are based on industry standards such as STARC, DO-254 and other customer-derived requirements. It works in conjunction with the manual review process, and makes a valuable contribution to the overall design process when developing safety-critical applications (which must comply with standards such as IEC 61508 and DO-254/ED-80).

ALINT-PRO easily integrates into existing development environments, being fully scriptable using Tcl, but also has a powerful fully interactive GUI for rule setup and design debug.


ALINT-PRO’s main role is to identify design weaknesses before they manifest into bugs. It essentially provides the earliest level of verification, by checking your design against good coding practices.

Features and Benefits

  • Compile time analysis
  • Clock and Reset Domain Analysis
  • Elaboration (structural) design analysis checks
  • Supports VHDL, Verilog and SystemVerilog
  • Rule plug-ins based on industry standards such as STARC & RMM
  • Integrated result analysis and code tracing environment
  • HTML, PDF & text reporting

We are very aware that companies designing applications for FPGAs are constantly looking for ways to improve their development processes. Moreover, if the application is safety-critical – for use in the aerospace, defence or transport sector, for example – there is a need to demonstrate that a clearly defined design process has been followed.
The first step on this journey is design review and automation, with ALINT-PRO DRC. This works in conjunction with the manual review process to demonstrate that a defined design style has been followed. Automation ensures code analysis is run regularly, reducing risk by identifying errors early in the development process.


Related Articles, Blogs and Videos

VIDEO: ALINT-PRO 1.2 Basics: Importing and Running Other Designs

VIDEO: ALINT-PRO 1.4 Basics: Workspaces, Projects, and Libraries

VIDEO: ALINT-PRO 2.1 Console: Command Line Batch Modes

VIDEO: ALINT-PRO 3.3 External Tools: Unit Linting in Active-HDL

VIDEO: ALINT-PRO 4.1 Constraints: Block-Level Design Constraints

VIDEO: ALINT-PRO 4.4 Constraints: Automatic Generation

VIDEO: ALINT-PRO Integration with Sigasi Studio

BLOG: A Comprehensive RTL Verification Solution for VHDL

“ALINT is a fully automated verification environment which is intuitive and can be used with minimal training. Other products, including no-cost options, were considered however as a supported product, ALINT provides better continuity and is straightforward for engineers to engage with.” – Renishaw

Contact FirstEDA for more information and pricing.