Article: Crossed Wires On Domains - FirstEDA
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Article: Crossed Wires On Domains

December 19th, 2019: By – Brian Bailey

 

 

How well understood are domain crossings, especially when it involves multiple domains? They require a combination of methodology and tools.

 

 

Clock, power and reset domains can form a tangled web if systems are not architected correctly. Wires that cross these domains often require special treatment and additional analysis. They are all evolving independently, meaning that designers must keep up with the latest methodology guidelines and tool capabilities to ensure problems do not remain hidden until they get exposed in silicon.

 

Clock domains increase with design complexity and an increase in third-party IP, and they often are associated with I/O circuitry that needs to operate at specific frequencies. As leakage became an increasing problem for battery-powered devices, power domains were added, as well. This, in turn, significantly increased the complexity associated with reset. FinFETs were use to control the leakage, but clock and reset domains continue to increase in number and complexity. Designs that remain in planar technologies have to continue worrying about power domains, as well.