DO-254/CTS  DO-254 Icon 32


DO-254/CTS is a fully customised hardware and software platform that augments target board testing to increase verification coverage by test and to satisfy the verification objectives of DO-254/ED-80.


The target design runs at-speed in the target device which is mounted to a custom daughterboard. A simulation testbench is used to produce test vectors enabling requirements-based testing, with 100% FPGA pin-level controllability and visibility necessary to implement normal range and abnormal range tests.

The FPGA testing results are captured at-speed and displayed using a simulator waveform viewer for advanced analysis and documentation.

This platform facilitates the at-speed, in-hardware verification of designs intended for use in safety-critical aerospace applications; and which must comply with DO-254. The clever re-use of simulation testbenches to produce test vectors is a real benefit too.

Features and Benefits

  • At-speed testing in target device
  • Reuse testbench as test vectors
  • Increase verification coverage by test
  • FPGA I/Os full visibility/controllability
  • Early access to FPGA hardware board for device testing
  • For use with Altera, Lattice, Mircrosemi and Xilinx devices
  • Supports FPGAs with serial high speed I/Os (ARINC 818, PCIe, DDR3 and LVDS)
  • Single environment to verify all FPGA level requirements
  • Automated in-hardware testing
  • Hardware testing results visualisation with waveform viewer
  • Integration with third party RTL simulator, synthesis and P&R tools

DO-254/CTS has been used by leading aerospace companies for certification with EASA & FAA and FirstEDA are very proud to have supported key programmes for the Airbus A350. Working with Aldec we are able to provide custom hardware with the flexibility needed for a live programme. Using the vectors from simulation and our VT tool, the programmed device can be setup and validation started in the first week from delivery of the hardware.


Related Webinars, Articles and Videos

WEBINAR: DO-254/CTS – How to Increase Verification Coverage by Test (Aldec and Altera)

WEBINAR: Best Practices for DO-254 Requirements Traceability

WEBINAR: DO-254 FPGA Level In-Target Testing

WEBINAR: DO-254 Verification Strategies

WEBINAR: Efficient Verification Approach for DO-254 Designs

ARTICLE: SemiWiki: Conflating ISO 26262 and DO-254


Julian Lonsdale, Director, FirstEDA

“DO-254/CTS is a fully customised hardware and software platform that increases verification coverage by test for it’s users. To ensure your FPGA satisfies the verification objectives of DO-254/ED-80, the system allows you to do at-speed testing in target device and provides a single environment to verify all FPGA level requirements.”

Contact us for more information and pricing.