Article: Debugging Complex SoCs
Experts at the Table, Part 1: Why time spent in debug is increasing, underlying trends, and what surveys do not reveal. ...
27 June, 2019
Archive
Article: Meanwhile, 35 Years Later…
Why SoC hybrid co-emulation for verification of hardware and software is so important today. ...
27 June, 2019
Article: Enabling The RISC-V Ecosystem
Industry initiatives are critical factors for processor family success. ...
27 June, 2019
Article: Who’s Responsible For Security Breaches?
Experts at the Table, part 2: How are we dealing with security threats, and what happens when it expands to a much wider network? ...
24 June, 2019
Sigasi Studio v4.4 Released
Sigasi Studio 4.4 Released. It automatically configures the VHDL library setup and brings a faster Verilog and SystemVerilog editor....
20 June, 2019
Blog: Design Rule Checking – How Early is Early?
Our application specialist outlines the importance of early design analysis in his methodology to reduce uncertainty during the debugging phase of verification....
18 June, 2019
Blog: Aldec Blog Post – 35-years-old, and still on point
Aldec's Hardware General Manager, Zibi Zalewski, talks about his trip to this year's Design Automation Conference held in Las Vegas, June 3-5....
18 June, 2019
Article: Circuit Ageing Becoming A Critical Consideration
As reliability demands soar in automotive and other safety-related markets, tools vendors are focusing on an area often ignored in the past. ...
17 June, 2019
Article: Training Tomorrow’s Chip Designers
The semiconductor industry partners with academia in a variety of ways to support the next generation of electrical engineers. ...
14 June, 2019
Article: Disregard Safety And Security At Your Own Peril
Experts at the Table, part 1: How do automotive notions of safety and security compare to those in avionics? ...
14 June, 2019