June 27th, 2019 – By: Zibi Zalewski
Why SoC hybrid co-emulation for verification of hardware and software is so important today.
At this year’s Design Automation Conference, held on June 3, 4 and 5 in Las Vegas and about 10 miles away from our head office in Las Vegas, Nevada, we celebrated our 35th anniversary with a resounding reaffirmation of our raison d’etre: the provision of verification solutions for some of industry’s most pressing challenges.
We had on display a variety of solutions – both hardware and tools-based – and it was most pleasing to see the high level of interest shown by engineers. Most had an immediate or imminent need for something on display, confirmation that not only were our selections of which products to showcase good ones but that Aldec continues to serve genuine needs within the engineering community.
As General Manager of Aldec’s Hardware Division, I was particularly pleased by the interest shown in a SoC hybrid co-emulation demo we gave, and which solves a major problem hardware and software engineers face when collaborating on the verification of their respective design parts. Specifically, hardware is typically verified out of context with the software, and vice versa. For example, the software engineers verify on models of hardware (which can be very expensive, and which run slowly).
On the premise that the SoC or ASIC under development is likely to contain an ARM core, we simply said: OK, let’s ‘share’ the one in the Xilinx Zynq US+ FPGA on one of our high-end TySOM-3 boards (a platform which itself support the co-development of hardware and software) with our HES-US-440 hardware emulation platform.