OSVVM: The #1 VHDL Verification Library
Open Source VHDL Verification Methodology (OSVVM) has been named the number #1 VHDL Verification Library...
30 January, 2019
Archive
Article: Aldec facilitates design prototyping in FPGA and prototype testing with new HES Proto-AXI
Aldec has unveiled the latest release of HES Proto-AXI...
23 January, 2019
Article: Power Issues Rising For New Applications
Why managing power is becoming more difficult, more critical, and much more expensive....
22 January, 2019
Article: Taming Concurrency
What hoops will designers have to jump through to avoid concurrency bugs? ...
18 January, 2019
Article: Mostly Upbeat Outlook For Chips
2019 will be a year of change for the semiconductor industry as new fields drive technological advancements. ...
17 January, 2019
Article: EDACafe Industry Predictions for 2019 – OneSpin
OneSpin sees two trends dominating the semiconductor and EDA industry for 2019....
14 January, 2019
Article: AV Testing Advances Without Standards
While U.S. struggles to make rules for self-driving cars, industry works on streamlining validation....
09 January, 2019
Article: Chip Design Verification: It’s All About the Coverage
As the cost of chip turns has grown from thousands to millions of dollars, missed design bugs are unacceptable...
08 January, 2019
Article: Deep Learning Hardware: FPGA Vs. GPU
While GPUs are well-positioned in machine learning, data type flexibility and power efficiency are making FPGAs increasingly attractive....
07 January, 2019
Article: AI Market Ramps Everywhere
The term creates hope for some, fear for others, and confusion for all....
07 January, 2019