Blog: OneSpin Blog – CEO Perspective – Innovation Requires IC Integrity
OneSpin are committed to assuring that IC integrity standards are being met when developing functionally correct, safe, trusted and secure designs....
OneSpin are committed to assuring that IC integrity standards are being met when developing functionally correct, safe, trusted and secure designs....
OneSpin 360 DV-Verify Fills High-Level Synthesis Verification Gap for Data-Driven Designs in 5G, WiFi, Other Applications ...
Onespin's Co-founder and VP Engineering Dominik Strasser weighs in on machine learning and how they are experimenting and blazing trails on the cutting edge of...
Learn about a method for securing RISC-V IP that uses Operational SVA to formalise the RISC-V ISA. This paper says the resulting set of assertions...
Aldec have introduced automatic UVM register generation to Riviera-PRO, the company’s advanced verification platform....
Aldec have developed a high-speed HDL synthesizer called SyntHESer as a part of the company’s HES-DVM emulation tool. ...
Rick O’Connor, former Executive Director of the RISC-V Foundation, leads organization for collaboration, ecosystem development and open-source processor cores ...
RISC-V Verification App Provides RISC-V Community with Only Solution to Exhaustively Verify IP Implementations, Ensure 100% Compliance ...
OneSpin 360 EC-FPGA Ensures Design Integrity for Machine Learning, AI, Big Data, High-Bandwidth Applications that Require Highly Optimized Implementations, QoR ...
Stop by and see the OneSpin team at the 56th Design Automation Conference (DAC), June 2–6 at Las Vegas Convention Center in Las Vegas, Nevada....