Formal Verification of RISC-V Cores - FirstEDA
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Formal Verification of RISC-V Cores

Formal Verification of RISC-V Cores

 

Salaheddin Hetalani, OneSpin Solutions

 

Salaheddin Hetalani, field application engineer, talks about formal verification of RISC-V cores at Embedded World 2020 in Nuremberg, Germany.