Several years ago at the Design Automation Conference (DAC) the talk was of big data.
Chip designers could find rich seams of information and get each successive project completed faster by mining their own database. Such projects looked to be prime candidates because of electronic design automation’s (EDA) ability to generate enormous datasets.
Areas such as physical verification did prove able to play EDA’s version of Moneyball. GlobalFoundries mined its database of layouts to find the pathological cases more or less guaranteed to cause yield failures. With millions of transistors per design and a lot of designs passing through, identifying the trouble spots was not easy but it was achievable. But other areas found the idea of data mining to be more promise than reality.