Automation of the UVM Register Abstraction Layer
Automation of the UVM Register Abstraction Layer ...
04 June, 2020
Archive
The Increasingly Ordinary Task Of Verifying RISC-V
The Increasingly Ordinary Task Of Verifying RISC-V ...
04 June, 2020
Introduction: The Challenges of Verifying RISC-V
Introduction: The Challenges of Verifying RISC-V ...
04 June, 2020
Blog: Active-HDL Hints & Tips
This blog explains solving a problem for an Active-HDL customer....
02 June, 2020
cocotb: Use Python and bring joy back to verification
cocotb: Use Python and bring joy back to verification...
02 June, 2020
Global STAC Live
Sigasi is joining the Global STAC Live online event. Come and visit their virtual booth!...
02 June, 2020
How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices
Faster inference in DNN-based applications using FPGAs ...
02 June, 2020