Archive

[vc_row][vc_column width="1/6"][vc_single_image image="21997" border_color="grey" img_link_large="" img_link_target="_self" qode_css_animation=""][/vc_column][vc_column width="5/6"][vc_column_text]Guest Blog by Doug Amos, One-Man-Army FPGA Consultant — There’s no question; verification is a massive time drain in...

[vc_row][vc_column width="1/6"][vc_single_image image="18721" border_color="grey" img_link_large="" img_link_target="_self"][/vc_column][vc_column width="5/6"][vc_column_text]Randall Fulton, FAA DO-254 DER, will share his industry insights from 18 years of holding approval authority for PLDs ...

[vc_row][vc_column width="1/6"][vc_single_image image="18719" border_color="grey" img_link_large="" img_link_target="_self" qode_css_animation=""][/vc_column][vc_column width="5/6"][vc_column_text]Tech Design Forum article: David Kelf, OneSpin Solutions — High-level synthesis provides a way to explore hardware architectures to...

[vc_row][vc_column width="1/6"][vc_single_image image="18721" border_color="grey" img_link_large="" img_link_target="_self"][vc_separator type="transparent" position="center" thickness="30" width_in_percentages=""][vc_single_image image="18719" border_color="grey" img_link_large="" img_link_target="_self" qode_css_animation=""][/vc_column][vc_column width="5/6"][vc_column_text]What’s the baseline for security and who’s responsible for seeing...

[vc_row][vc_column width="1/6"][vc_single_image image="18721" border_color="grey" img_link_large="" img_link_target="_self"][/vc_column][vc_column width="5/6"][vc_column_text]First of two parts: Systems vendors used to take their lead from chipmakers. Not anymore.   Throughout the PC era and...

[vc_row][vc_column width="1/6"][vc_single_image image="18721" border_color="grey" img_link_large="" img_link_target="_self"][/vc_column][vc_column width="5/6"][vc_column_text]Functions and new OSes become the starting point for SoCs, but hardware still matters.   The influence of software engineers is...

[vc_row][vc_column width="1/6"][vc_single_image image="18721" border_color="grey" img_link_large="" img_link_target="_self"][/vc_column][vc_column width="5/6"][vc_column_text]Given the critical importance of software as a differentiator in SoC-based products, doesn't the software team deserve the best...

[vc_row css_animation="" row_type="row" use_row_as_full_screen_section="no" type="full_width" angled_section="no" text_align="left" background_image_as_pattern="without_pattern"][vc_column width="1/6"][vc_single_image image="24570" qode_css_animation=""][vc_column_text]Author FirstEDA[/vc_column_text][/vc_column][vc_column width="5/6"][vc_column_text el_class="cus-links"]OSVVM provides a low-risk approach to improving verification effectiveness when adopted as part of...

[vc_row][vc_column width="1/6"][vc_single_image image="16112" border_color="grey" img_link_large="" img_link_target="_self"][/vc_column][vc_column width="5/6"][vc_column_text]The industry says the focus of new verification efforts is misguided and that only the easy problems are being...

[vc_row][vc_column width="1/6"][vc_single_image image="18721" border_color="grey" img_link_large="" img_link_target="_self"][/vc_column][vc_column width="5/6"][vc_column_text]Chris Higgs of Potential Ventures will demonstrate what is arguably the most productive RTL development flow in the world ...