A groundswell of activity around multi-die integration and advanced packaging is pushing EDA companies to develop integration strategies that speed up time to sign-off, increase confidence that a design will work as expected, while still leaving enough room for highly customized solutions.
Challenges range from how to architect a design, how to explore the best options and configurations, how to phase the actual design process, and which tools to use for planning, design, implementation and validation. Flows are well established for the individual chips that are used in a package, putting the pieces together is much more problematic. The general consensus is that while many point tools exist, there isn’t just one flow, or even a complete flow, from a single vendor. That’s both good and bad.
“This is not your father’s IC packaging,” said John Park, product management director for IC packaging and cross-platform solutions at Cadence. “No one company has the perfect flows for the latest variations of packaging.”