Article: Thoroughly Verifying Complex SoCs - FirstEDA
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Article: Thoroughly Verifying Complex SoCs

November 26th, 2019 – By: Ann Steffora Mutschler


With so many variables, verifying complex, heterogenous designs is a task with many tentacles.


The number of things that can go wrong in complex SoCs targeted at leading-edge applications is staggering, and there is no indication that verifying these chips will function as expected is going to get any easier.


Heterogeneous designs developed for leading-edge applications, such as 5G, IoT, automotive and AI, are now complex systems in their own right. But they also need to work in conjunction with other systems in predictable and provable ways for an expected lifetime and under variable conditions. And this is where things get really complicated, because chipmakers need to pay attention not only to how the design functions, but also to ensure the device is safe, secure, and trusted. It must operate as intended even under the most adverse conditions and be immune from unwarranted or unexpected interference, whether unintended or malicious.


“Multi-billion gate chips and heterogeneous platforms are so complex, containing millions of connections, that simulation is inefficient and insufficient,” said Rob van Blommestein, head of marketing at OneSpin Solutions. “What’s needed is exhaustive technology that can handle the massive number of connections. If we’re looking at AI applications that utilise floating point units, the verification of these designs must take into account how to effectively verify floating-point hardware, including ensuring the complex IEEE 754 floating-point standard is being met.”