May 30th, 2019 – By: Brian Bailey
Adding an eFPGA into an SoC is more complex than just adding an accelerator.
Choosing to add programmable logic into an SoC with an eFPGA is just the beginning. Other choices follow involving how many lookup tables (LUTs), how much routing and what topology, how will data be transferred in and out of the fabric, does data need to be coherent with system memory, how will it be programmed and tested, and what RTL functions need to be embedded into the programmable fabric itself?
Some of these decisions will be influenced by the application. Is it going to be a compute accelerator? Is it doing sensor processing, or perhaps part of a pipelined datapath? Providers of eFPGA technology are attempting to make their offerings as flexible as possible. But while the content going into the eFPGA can be deferred, decisions about the eFPGA cannot.