Article: Hybrid Emulation Takes Centre Stage - FirstEDA
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Article: Hybrid Emulation Takes Centre Stage

July 25th, 2019 – By: Ann Steffora Mutschler

 

 

Complex chips require a multitude of verification platforms working in sync, and that’s where the challenges begin.

 

From mobile to networking to AI applications, system complexity shows no sign of slowing. These designs, which may contain multiple billion gates, must be validated, verified and tested, and it’s no longer possible to just throw the whole thing in a hardware emulator.

 

For some time, emulation, FPGA-based prototyping, and virtual environments such as simulators have given design and verification teams options when it comes to making sure their designs function properly. Now, because of highly competitive market pressures and system complexity, these technologies are being brought together in a variety of new ways to tackle the enormity of the system verification challenge.