Article: Adopting New Methods For Faster Development Of RISC-V based SoCs

The growth of new technologies such as artificial intelligence, machine learning, Internet of Things (IoT), virtual/augmented reality and of course, the various technologies for the automotive industry has led to a new surge in the development of semiconductor chips. The growth had been stunted in part due to the considerable cost involved in using the processor core, which forms the heart of most SoCs. The enormous cost, risk, development time and necessary volumes of developing a processor, has kept this lucrative industry in the hands of just a few companies. That is, until now.

 

With the development of the open source RISC-V ISA from UC Berkeley labs, based on the new computing needs in various power and performance dimensions, the semiconductor industry is once again at the cusp of embracing an incredible surge in innovation. Over the last few years, the interest in RISC-V has been gaining steam with commercial implementations and adoption growing rapidly.

 

The RISC-V core is an open development model that is managed by the RISC-V Foundation, which has a number of member companies. In a short span of time, it has helped foster an industry-wide collaboration, including building an ecosystem to work around it, especially since it is designed to support both proprietary and open implementations. With support for a variety of bus fabric such as TileLink and AMBA AXI/AHB/APB, the RISC-V core becomes an ideal candidate for new applications such as wearable’s, high performance embedded systems such as smart IoT, AI etc.