To Emulate or Prototype: is it even a question?
Blog by Krzysztof Szczur, Hardware Technical Support Manager
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Recently I read a Semiwiki article (Army of Engineers on Site Only Masks Weakness), in which author Jean-Marie Brunet of Mentor Graphics wrote that FPGA Prototyping requires an army of tech support engineers on-site to mask the weaknesses of FPGA prototyping flows. As the Technical Support Manager for Aldec Hardware Emulation Solutions, I have to admit I’ve never had to deploy an army onsite.
It is true that FPGA Prototyping is more challenging than emulation. Yet, for the time invested in prototype setup, developers are rewarded with a validation platform that is capable of running orders of magnitude faster than emulation.
Emulation also has its benefits that appeal especially to design verification engineers. Aside from the completely automated compilation and setup flow, it offers robust debugging capabilities and a plethora of interfaces that connect the emulator with various verification environments like HDL Simulators, Virtual Platforms, model based design tools (e.g. Matlab and Simulink) or any other environment capable of C/C++ linking.