From: [ Jim Hogan of Vista Ventures LLC ]
Subject: Jim Hogan on how “this is not your father’s formal verification”
Hi, John
First, some U.S. cultural history for your non-U.S. readers (and for those U.S. engineers born after 1980). Back before Facebook and the Internet, the way most Americans got their news was from printed magazines and newspapers.
This 1988 ad is where the “this is not your father’s…” meme came from.
I’m showing your readers this old print ad because the one big takeaway I want them to get from this report is how dramatically formal verification has grown over the last 20 years. This is not their father’s formal.
Our present day way of verifying chips all started when Cadence acquired Gateway DA back in 1989 — and it started selling the Verilog-XL simulator. Prior to 1989, the closest thing to chip simulation was an old 1973 FORTRAN program from U. Berkeley called “SPICE1”, but it only did nodal analysis of analog circuits. Cadence Verilog-XL was the world’s first digital HW simulator that worked at the digital gate-level (or higher).