Part of the Planning Process in DO-254 is knowing the appropriate FPGA tools and capabilities that you need and intend to use for your FPGA design. Particularly if your FPGA device operates with multiple asynchronous clocks which necessitates using advanced verification techniques targeting anomalies related to clock domain crossings (CDCs).
Typical electronic design automation (EDA) tools for functional simulation and static timing analysis are insufficient to uncover CDC effects, leaving systems at risk of failure without further specialized analysis. EDA tools typically concentrate on implementing and verifying functional requirements efficiently, but since CDCs are non-functional, they often elude traditional approaches.
What does RTCA/DO-254 guidance say about CDCs? The quick answer is nothing. The guidance does not mention clock domain crossings at all.