DO-254/CTS 
FPGA LEVEL IN-TARGET TESTING / SAFETY
DO-254/CTS is a fully customised hardware and software platform that augments target board testing to increase verification coverage by test and to satisfy the verification objectives of DO-254/ED-80.
The target design runs at-speed in the target device which is mounted to a custom daughterboard. A simulation testbench is used to produce test vectors enabling requirements-based testing, with 100% FPGA pin-level controllability and visibility necessary to implement normal range and abnormal range tests.
The FPGA testing results are captured at-speed and displayed using a simulator waveform viewer for advanced analysis and documentation.
This platform facilitates the at-speed, in-hardware verification of designs intended for use in safety-critical aerospace applications; and which must comply with DO-254. The clever re-use of simulation testbenches to produce test vectors is a real benefit too.
Features and Benefits
- At-speed testing in target device
- Reuse testbench as test vectors
- Increase verification coverage by test
- FPGA I/Os full visibility/controllability
- Early access to FPGA hardware board for device testing
- For use with Altera, Lattice, Mircrosemi and Xilinx devices
- Supports FPGAs with serial high speed I/Os (ARINC 818, PCIe, DDR3 and LVDS)
- Single environment to verify all FPGA level requirements
- Automated in-hardware testing
- Hardware testing results visualisation with waveform viewer
- Integration with third party RTL simulator, synthesis and P&R tools
DO-254/CTS has been used by leading aerospace companies for certification with EASA & FAA and FirstEDA are very proud to have supported key programmes for the Airbus A350. Working with Aldec we are able to provide custom hardware with the flexibility needed for a live programme. Using the vectors from simulation and our VT tool, the programmed device can be setup and validation started in the first week from delivery of the hardware.
Julian Lonsdale, Director, FirstEDA